- OpenAI and Broadcom launched Jalapeño, a custom AI inference chip built for large language model workloads.
- Broadcom CEO Hock Tan claims the Jalapeño chip delivers roughly 50% lower cost per inference compared to typical AI GPUs.
- The chip went from initial design to manufacturing tape-out in nine months, a timeline accelerated by using OpenAI’s own AI models.
OpenAI and Broadcom have jointly unveiled a custom AI inference chip called Jalapeño, built from the ground up for large language model workloads. Broadcom CEO Hock Tan claims it delivers roughly 50% lower cost per inference than a typical AI GPU, a figure that will face scrutiny once independent benchmarks arrive. The chip was taped out in nine months, a timeline the companies say was accelerated by using OpenAI’s own models during the design process.
OpenAI and Broadcom Launch Jalapeño: A Strategic Chip Play
The collaboration, first hinted at in October 2025, brings together OpenAI for architecture and software co-design, Broadcom for silicon implementation and networking, and Celestica for board and system integration. OpenAI describes Jalapeño as its inaugural “Intelligence Processor,” a purpose-built inference ASIC rather than a repurposed training accelerator.
The move follows a well-worn path: Google has its Tensor Processing Units, Meta its Training and Inference Accelerators, both co-developed with Broadcom. OpenAI is now pursuing the same vertical integration logic. At its current scale, the company reports over 800 million weekly active users across its products, inference costs are an enormous operational burden, and custom silicon is one of the few ways to structurally reduce them.
Nine Months from Design to Tape-Out
Nine months from initial design to manufacturing tape-out is fast for any ASIC, let alone one targeting frontier AI inference. Traditional custom chip programs routinely run two to four years. OpenAI says the compressed timeline came from two things: tight software-hardware co-development between its engineering teams and Broadcom’s silicon group, and the use of OpenAI’s own models to accelerate parts of the design and optimisation process.
That second element deserves attention. Using AI to assist chip design is not entirely new, Google and others have explored reinforcement learning for floorplanning, but applying a frontier LLM to compress a full ASIC development cycle at this scale has not been publicly demonstrated before at this speed. Whether the nine-month figure holds up as a genuine record will become clearer when the technical report is published. The more consequential question is whether the methodology can be replicated: if AI assistance reliably shortens design cycles, the cost and time barriers to custom silicon drop for anyone who can build competitive models.
What the Architecture Is Actually Optimised For
Jalapeño is not a general-purpose accelerator. Richard Ho, who leads OpenAI’s hardware programme, says the chip was engineered around the specific kernels, memory movement patterns, networking requirements and serving patterns that matter for frontier LLM inference, the workloads running ChatGPT, the OpenAI API and future agentic products.
The architecture uses high-bandwidth memory rather than the cheaper DRAM variants found in some inference-focused accelerators. That matters for the memory-bandwidth-bound nature of autoregressive LLM decoding, where token generation speed is often constrained by how fast weights can be moved, not raw compute. OpenAI claims early testing shows the chip running its most important workloads close to theoretical hardware limits, implying high utilisation. Full performance figures have not been disclosed; the company says a detailed technical report is coming.
The Cost Reduction Case
The 50% cost saving claim comes from Hock Tan and is framed around inference workloads specifically, not training. That distinction matters: inference is where OpenAI spends most of its compute budget at this scale, and it is structurally different from training in ways that reward custom silicon. Training workloads demand flexible, high-FLOPS accelerators that handle many model architectures. Inference at scale is repetitive, predictable and bottlenecked by memory bandwidth and networking, exactly the profile where a purpose-built ASIC can pull ahead of a general-purpose GPU.
Greg Brockman, OpenAI’s president and co-founder, has framed the hardware initiative around a “compute-powered economy” thesis: more compute abundance leads to faster, cheaper and more reliable AI services. The financial logic is straightforward for a company that does not yet turn a profit despite its user base. Owning the inference layer reduces dependency on Nvidia and gives OpenAI direct control over the cost-per-token that ultimately determines product margins. As Amazon’s custom silicon push has shown, hyperscalers and major AI labs are all making the same calculation.
Where Jalapeño Sits in the Competitive Field
Broadcom positions Jalapeño as competitive with Nvidia’s Blackwell line and Google’s TPUs.
OpenAI is not abandoning Nvidia or AMD. The company will continue using their chips for workloads where GPU flexibility is needed, particularly training. Jalapeño is a targeted bet on inference efficiency, not a full replacement. The more interesting competitive pressure runs in the other direction: if the 50% inference cost claim is validated, it becomes a data point that other large AI labs will have to respond to, either by accelerating their own custom silicon programmes or by pushing Nvidia harder on inference-optimised pricing. For a broader look at how custom chip strategies are reshaping AI infrastructure investment, see this week’s AI infrastructure roundup.
The Deployment Plan
Initial Jalapeño deployments are targeted for late 2026, integrated into gigawatt-scale data centres alongside Microsoft and other partners. The October 2025 collaboration announcement outlined plans for 10 gigawatts of custom AI accelerator and network capacity over four years, with a completion target of end of 2029. Broadcom is supplying not just the silicon but also networking infrastructure, including its Tomahawk switching silicon, to ensure the platform can scale. Celestica handles board, rack and system integration.
Celestica handles board, rack and system integration. OpenAI describes Jalapeño as the first step in a multi-generation compute platform.
OpenAI describes Jalapeño as the first step in a multi-generation compute platform. A second-generation chip is reportedly planned for 2028, with annual releases after that. The multi-generational framing suggests this is infrastructure OpenAI intends to rely on seriously, not a one-off demonstration of hardware capability.
What to Watch
Three things will determine whether Jalapeño matters beyond the announcement. First, the promised technical report: performance-per-watt figures, memory bandwidth numbers and utilisation rates under production workloads will either support or undercut the 50% cost saving claim. Second, the late 2026 deployment: real-world integration into live data centre environments, particularly under the sustained demand of ChatGPT and API traffic, will stress-test claims made in controlled early testing. Third, the AI-assisted design methodology: the nine-month tape-out is interesting precisely because it implies repeatability. If OpenAI can run a similar cycle on a second-generation chip and compress it further, that becomes a structural advantage in hardware iteration speed, not just a single impressive sprint. Whether the Jalapeño generation performs as described will shape how aggressively the rest of the industry follows the same path. For more coverage of AI chips and infrastructure, visit our AI Hardware section.
