- TSMC’s $265 billion investment in its Arizona complex, encompassing ten fabs and two advanced packaging facilities producing 2nm and below chips, is driven as much by geopolitical risk reduction as by US customer demand.
- US export controls have blocked TSMC from making leading-edge chips for China’s largest tech companies, forcing Beijing to rely on domestic foundries like SMIC, whose best stable node (N+2) sits roughly one to two generations behind TSMC.
- Nvidia holds approximately 60% of TSMC’s CoWoS advanced packaging capacity, a chokepoint that now has hyperscalers like Microsoft competing directly against their primary chip supplier for production slots.
Nvidia’s next-generation Vera Rubin platform draws on 150 supply chain partners in Taiwan alone, which captures, in one figure, just how much of the AI hardware stack runs through a single island. TSMC fabricates over 90% of the world’s most advanced chips, and that concentration is now driving customers and governments to simultaneously depend on the company and push hard to spread its production elsewhere.
Taiwan’s Foundry Lead
TSMC’s grip on advanced process nodes is the foundation of its market position. The company held a 69.9% share of the global foundry market in 2025, up from 64.4% in 2024, with revenue reaching approximately $122.54 billion. Its 3nm process became the industry standard for high-performance computing and AI after its 2022 launch. The 1.6nm process is slated for commercial production in the second half of 2026. Nvidia, AMD, Apple, Google and Microsoft all depend on TSMC’s fabs for their AI accelerators.
That dependency has given Taiwan an unusual kind of leverage. Because disrupting TSMC’s operations would inflict severe damage on global supply chains, the island’s chip-making capacity functions as a deterrent, sometimes called a “silicon shield,” against military aggression. It is a strategic asset that no customer has an obvious interest in undermining, even as all of them are quietly building alternatives.
Export Controls and China’s Response
The US has progressively tightened export controls on advanced computing and semiconductor manufacturing equipment since October 2022, with further expansions in 2023 and 2024. Those rules now make it effectively impossible for TSMC to manufacture leading-edge AI chips for China’s largest technology companies. They also bar US persons from supporting Chinese chip facilities directly.
Beijing’s response has been to accelerate domestic production. Huawei, with its Ascend AI processors, and Alibaba, with its Zhenwu V900 accelerator, are the most visible examples. Huawei plans annual upgrades to the Ascend series through 2029, targeting a doubling of compute per generation. The ceiling on that ambition is China’s domestic foundry capacity: Semiconductor Manufacturing International Corporation (SMIC), the country’s largest chipmaker, runs its best stable node (N+2) at roughly the 7nm equivalent, one to two generations behind TSMC’s leading edge. SMIC reported overall utilisation rates above 93% for 2025, but closing the process node gap is a different challenge from filling fabs. As the domestic chip market accelerates, the performance gap between Chinese and leading-edge silicon remains the binding constraint on China’s AI ambitions.
Arizona and the Global Expansion
TSMC announced in July 2026 an additional $100 billion investment in its Arizona complex, bringing the total commitment there to $265 billion. The plan covers ten semiconductor logic wafer fabs and two advanced packaging facilities, all targeting 2nm and below production. The first Arizona fab entered high-volume production on 4nm in Q4 2024. The second is targeting 3nm production in the second half of 2027. A second fab in Japan is planned for 3nm mass production by 2028, with Germany also under consideration.
The investment is driven by two related pressures: US customers account for over 70% of TSMC’s revenue, and concentration in Taiwan carries geopolitical risk that those same customers are now explicitly managing. The Arizona build-out is not without friction: labour and water constraints have complicated the ramp, a reminder that Taiwan’s semiconductor output reflects decades of ecosystem optimisation that cannot simply be transplanted. The chip-building race across allied nations has broad momentum, with Japan and Korea both committing to advanced node production on their own soil.
The Packaging Bottleneck
CoWoS (Chip-on-Wafer-on-Substrate) packaging has become the supply chain’s tightest constraint. HBM-equipped AI chips, essential for training and running large language models, require this technology to stack memory directly on the compute die. Nvidia controls approximately 60% of TSMC’s advanced CoWoS packaging capacity, according to a September 2026 report. That allocation leaves relatively little room for everyone else.
Microsoft, designing its own Maia 300 in-house AI chip, now competes directly with Nvidia for those packaging slots, creating an unusual dynamic where a major Nvidia customer is also its rival in the fab queue. CoWoS wafer output is projected to grow from 360,000 units in 2024 to 810,000 in 2027, but the gap between demand and available capacity is what is setting strategy across the industry. Advanced packaging, more than process node leadership, is where the near-term AI chip supply chain breaks.
