- TSMC’s $165 billion US fab investment, covering three Arizona fabs and two advanced packaging facilities, introduces 2-4% higher operating costs compared to Taiwan, repricing advanced AI chip manufacturing for every customer in the chain.
- TSMC’s CoWoS advanced packaging capacity is sold out through 2026 despite output scaling to 130,000 wafers per month; Nvidia has reportedly reserved around 60% of that allocation, leaving AMD, Google and Amazon competing for the remainder.
- US export controls in force since October 2022 have cut Chinese firms off from high-end AI accelerators, pushing Huawei to ship domestic AI clusters, creating two distinct, potentially incompatible AI hardware supply chains.
TSMC does not just manufacture the chips that power AI, it controls how fast AI can scale, who gets access to it and at what price. Three converging pressures are tightening that grip simultaneously: a $165 billion US reshoring commitment that raises production costs, a packaging bottleneck that caps global accelerator output, and export controls that have split the market in two. Each of these was already consequential on its own. Together, they are rewriting the economics of AI hardware.
US Reshoring Efforts Raise Production Costs
The push to move advanced semiconductor manufacturing out of Taiwan has produced the largest fab investment in US history. TSMC has committed $165 billion to its Arizona operations: three fabs, two advanced packaging facilities and an R&D centre. The first fab started 4nm production in 2025. The second is scheduled for the second half of 2027. The third, potentially running 2nm processes, is targeted for the end of the decade.
The engineering achievement is real. The cost structure is harder to ignore. TSMC has warned that its overseas fabs will run at diluted margins, roughly 2% near-term, expanding to 3-4% as production scales, reflecting higher labour costs, more complex logistics and the difficulty of replicating Taiwan’s supplier network from scratch. Taiwan’s government has also rejected proposals to shift substantial domestic capacity to the US, citing TSMC’s “N-2 rule”: the most advanced process nodes stay in Taiwan. That rule exists for a reason. Decades of accumulated process knowledge, a deep local talent pool and a tightly integrated supplier base are not assets you can air-freight to Phoenix.
What this means for AI customers is straightforward: chips fabbed in Arizona cost more than chips fabbed in Hsinchu. That premium gets passed through the supply chain. The CHIPS Act subsidies soften the blow, but they do not eliminate the structural gap. Advanced AI chip manufacturing is getting more geographically distributed and more expensive at the same time.
Export Controls Bifurcate the Global AI Market
US export controls on advanced AI chips and semiconductor equipment, first imposed in October 2022 and tightened since, have effectively split the global market in two. TSMC, as the primary foundry for Nvidia and AMD, has no choice but to comply, which means China’s access to leading-edge AI accelerators is now a policy decision made in Washington, not a commercial one made in Hsinchu.
The response from Chinese firms has been predictable. Huawei has rolled out AI computing clusters built on domestically produced semiconductors, working around the absence of Nvidia’s highest-performance chips and ASML’s EUV lithography machines. The hardware is less capable by current benchmarks, but the trajectory matters: Chinese firms are being forced to build what they cannot buy, and they are making progress.
Taiwan is considering tighter export controls on AI chip sales to China, aligning more closely with US measures and aiming to prevent hardware diversion. If that alignment holds, TSMC and its customers face a shrinking addressable market in one of the world’s largest technology economies. The longer-term consequence is two distinct AI hardware supply chains developing in parallel, one built around TSMC and its US and allied customers, one built around whatever China can manufacture domestically. Whether those chains converge or diverge further depends heavily on how export policy evolves. This dynamic has obvious implications for anyone tracking the race to build orbital AI infrastructurewhere hardware access is just as consequential.
Advanced Packaging: The AI Bottleneck
The packaging problem does not get the attention it deserves. While the industry debates which process node comes next, the actual constraint on AI accelerator supply right now is CoWoS, Chip-on-Wafer-on-Substrate, the advanced packaging technology that bonds AI processor dies to High Bandwidth Memory on a silicon interposer. Without it, you cannot build a modern AI accelerator. And TSMC is essentially the only company that can do it at scale.
As of mid-2026, global CoWoS capacity is sold out. TSMC has been scaling aggressively, from around 35,000 wafers per month in late 2024 to a projected 130,000 by end of 2026, but demand from AI hyperscalers has kept pace. Lead times for some orders are running 52 to 78 weeks. Nvidia has reportedly reserved around 60% of TSMC’s CoWoS allocation and more than half of its 2026-2027 expansion capacity. That leaves AMD, Google (TPUs) and Amazon (Trainium) dividing what remains.
The practical effect is a hard ceiling on how many advanced AI accelerators the world can produce in a given quarter. No amount of chip design innovation changes that ceiling, it is set by how many CoWoS wafers TSMC can process. For any AI infrastructure team trying to plan capacity, that packaging constraint is more binding than the process node roadmap. You can read more about how chip-level constraints are shaping AI infrastructure investment in our coverage of the OpenAI and Broadcom Jalapeño chip.
Taiwan’s “Silicon Shield” Paradox
Taiwan sits 160 kilometres from mainland China and produces over 90% of the world’s most advanced logic chips. That concentration is both the source of TSMC’s leverage and the source of the risk that surrounds it. The “silicon shield” theory holds that global dependence on Taiwan’s fabs deters military action, any conflict in the Taiwan Strait would cause a supply chain disruption severe enough to halt AI infrastructure buildout worldwide, with some estimates putting the equity market impact in the range of $5 trillion to $10 trillion within days.
The deterrence logic is real, but it is also a paradox. The more indispensable Taiwan becomes, the more every major power wants to reduce that dependence, while simultaneously relying on it. The US is spending hundreds of billions to build domestic capacity, yet the timeline to meaningfully shift the balance is long. Getting the US share of global chip production from around 10% to 15% could take a decade, by some estimates. That gap is precisely why the Arizona fabs matter strategically even if they cost more to run.
For AI companies, the practical implication is a persistent geopolitical risk premium on Taiwan-sourced chips. That premium does not disappear with diversification, it just gets distributed differently. Long-term infrastructure planning now requires assumptions about geopolitical stability that did not feature in procurement decisions five years ago.
Intensified R&D and Competition for Advanced Nodes
TSMC began mass production of its 2nm N2 process in late 2025, with capacity already allocated well into 2028. Customers include Nvidia, Apple, AMD, Qualcomm, Microsoft, Amazon and Google. The N2 node delivers meaningful gains in transistor density and power efficiency, relevant for AI training workloads where the energy cost of a forward pass is a real operational expense, not just a spec sheet number.
The competition is real, though the gaps are significant. Samsung Foundry is pushing into 2nm and 1.4nm territory using Gate-All-Around transistor architecture, but yield consistency has been a recurring challenge relative to TSMC’s production track record. Intel’s 18A process, which uses RibbonFET transistors and PowerVia backside power delivery, is technically ambitious and positions Intel as a credible foundry option with US-based manufacturing, a genuine selling point for customers who need supply chain diversification. Intel is also developing differentiated packaging through EMIB and Foveros, which addresses some of the same integration problems CoWoS solves.
Whether Samsung or Intel can close the gap with TSMC on yield, delivery predictability and packaging integration over a five-year horizon is an open question. What is not open is the strategic importance of the answer. Foundry leadership in advanced nodes is now explicitly a matter of national industrial policy across the US, EU, Japan and South Korea, not just a semiconductor industry competition. That political weight accelerates investment but also complicates the purely technical calculus of which fab a customer should trust with their next-generation chip. For more coverage of AI chips and infrastructure, visit our AI Hardware section.
